Intel C2350 FH8065401488914 Data Sheet
Product codes
FH8065401488914
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
71
Volume 2—System Agent and Root Complex—C2000 Product Family
Global Error Reporting
A more detailed architectural view of all SoC error handling is shown in
Figure 4-3
.
The SoC detects errors from the PCIe* links and the SoC internal device errors. The
errors are first logged and mapped to an error severity, and then mapped to a system
event(s) for error reporting.
SoC error-reporting features are summarized below. Details are in the following
sections.
• Detects and logs PCIe links and SoC internal device errors.
• First error/next error detection and logging for correctable/uncorrectable local
• First error/next error detection and logging for correctable/uncorrectable local
errors.
• Allows flexible mapping of local uncorrectable errors to fatal or non-fatal error
classes.
• First/next error detection and logging for correctable, non-fatal, and fatal global
errors.
• Flexible error reporting using multiple reporting mechanisms.
• Supports PCIe error reporting mechanism based on the Root Complex Event
• Supports PCIe error reporting mechanism based on the Root Complex Event
Collector (RCEC).
The SoC provides direct mapping of system errors to NMI or SMI. The System Error
(SERR) mechanism is not used to do this.
Figure 4-3. Error Handling Architecture
ERROR2_B
ERROR1_B
ERROR0_B
Global Errors
Non-PCI Devices
Local Error Status/
Mask/Severity
Register
Global Error
Log Register
Global Error
Status/Mask
Register
System
Event
Map
Register
Root Complex Event
Collector
(RCEC)
PCIe Root Ports
AER Registers
PCIe* RC Integrated End
Points
AER Registers
Intx/MSI
Intx/MSI
NMI
SMI
ERR_CORR/
ERR_NONFATAL/
ERR_FATAL
Messages
Intx/MSIx
Local Uncorrectable
Error Status / Mask /
Severity Register
Local Correctable
Local Correctable
Error Status / Mask
Register
PCI Devices
Local Error
Status
Register
MCERR_B
IERR_B