Intel C2350 FH8065401488914 Data Sheet
Product codes
FH8065401488914
Volume 2—System Agent and Root Complex—C2000 Product Family
Global Error Reporting
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
94
Order Number: 330061-002US
In addition, the Error Pin registers allow error-pin assertion for an error. When
an error is reported to the SoC, the SoC uses the severity level associated with
the error to lookup for which system event is sent to the system. For example,
a fatal error is mapped to an NMI with the ERROR2_B pin enabled by the
software. If a fatal error is reported and logged by the Global Log register, then
an NMI is dispatched to the CPU and the SoC asserts the ERROR2_B signal pin.
The CPU or BMC reads the Global and Local Error Log register to determine
where the error came from and how it handles the error.
At power-on reset, these registers are initialized to their default values. The
At power-on reset, these registers are initialized to their default values. The
default mapping of error class (severity) and system event is set to be
consistent with
. The firmware chooses to use the default values or
modify the mapping according to the system requirements.
The System Event Mask register is a non-sticky register that is cleared by a
The System Event Mask register is a non-sticky register that is cleared by a
hard reset.
Figure 4-7. System Event Generation
Table 4-11. Default Error Severity Map
Error Severity
Error Reporting to CPU
(Programmable)
Error Reporting to an
External Device
Correctable Error
CPU: NMI/SMI - Default: SMI
Non-Fatal Error
CPU: NMI/SMI - Default: NMI
Fatal Error
CPU: NMI/SMI - Default: NMI