Intel E3845 FH8065301487715 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

1045

The core of the ISP is a vector processor. The vector processor is supported by the 
following components:

• Interfaces for data and control
• A small input formatter that parallelizes the data
• A scalar (RISC) processor, for system control and low-rate processing
• An accelerator for scaling, digital zoom, and lens distortion correction
• A DMA engine transfers large amounts of data such as input and output image data 

or large parameter sets between LPDDR2 and the ISP block.

The camera subsystem has capabilities to deal with a virtual address space, since a 
contiguous memory range in the order 16–32MB cannot be guaranteed by the OS. 

The MMU performs the lookup required for address translation from a virtual to physical 
32-bit address. The lookup tables are stored external to the system. The MMU performs 
the lookup through a master interface without burst support that is connected to the 
Open Core Protocol (OCP) master of the subsystem. The MMU configuration registers 
can be accessed through a 32-bit Core I/O (CIO) slave interface. Additionally there is a 
32-bit CIO slave interface connected to the address translator.