Intel E3845 FH8065301487715 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

3612

Datasheet

Default: 00000000h

15

0h

RW/1C

PME Status (PMESTATUS): 
•

0 = Software clears the bit by writing a 1 to it. 

•

1 = This bit is set when the AHB Device would normally assert the PME# signal 

independent of the state of the PME Enable bit (bit 8 in this register). 

14:9

00h

RO

Reserved.

8

0h

RW

A 1 enables the function to assert PME#. When 0, PME# 

message on SB is disabled.

7:4

0h

RO

Reserved.

3

1h

RO

This bit indicates that devices transitioning from 

D3hot to D0 because of PowerState commands do not perform an internal reset. 

Configuration Context is preserved.

2

0h

RO

Reserved.

1:0

0h

RW

This field is used both to determine the current power 

state of the AHB IP and to set a new power state. The values are: 
•

00 = D0 state 

•

11 = D3HOT state 

•

Others  =  Reserved 

Notes: If software attempts to write a value of 01b or 10b in to this field, the write 

operation must complete normally; however, the data is discarded and no state change 

occurs. When in the D3HOT states, interrupts are blocked. D3Hot will not be used for 

Downstream decode on fabric ports.

PCI Configuration Register

(Size: 32 bits)

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MANID

31:0

00000000h

RO

This register is brought out as straps to the top level.