Intel E3845 FH8065301487715 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

3824

Datasheet

The master can initiate data transmission and reception to/from the bus, acting as 
either a master-transmitter or master-receiver. A slave responds to requests from the 
master by either transmitting data or receiving data to/from the bus, acting as either a 
slave-transmitter or slave-receiver, respectively.

All data is transmitted in byte format, with no limit on the number of bytes transferred 
per data transfer. After the master sends the address and RW bit or the master 
transmits a byte of data to the slave, the slave-receiver must respond with the 
acknowledge signal (ACK). When a slave-receiver does not respond with an ACK pulse, 
the master aborts the transfer by issuing a STOP condition. The slave must leave the 
data line high so that the master can abort the transfer.

If the master-transmitter is transmitting data as shown in 

, then the slave-

receiver responds to the master-transmitter with an acknowledge pulse after every 
byte of data is received.

0000 1XX

X 

1111 1XX

X 

1111 0XX

X 

S

DATA

DATA

R/W

Slave Address

A

A/A

P

A

S

DATA

Slave Address

Second Byte

R/W

Slave Address

First 7 bits

A

A/A

P

A

For 7-bit Address

For 10-bit Address

0' (write)

From  M aster to Slave

From  Slave to M aster

A = Acknowledge (Data low)

A = No Acknowledge (Data high)

S = START Condition

P =  STO P Condition 

‘11110xxx’

0' (write)