Intel E3845 FH8065301487715 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

5300

Datasheet

Master ICW2 is used to initialize the interrupt controller with the five most significant 

bits of the interrupt vector address. The value programmed for bits[7:3] is used by the 

CPU to define the base address in the interrupt vector table for the interrupt routines 

associated with each IRQ on the controller. Typical ISA ICW2 values are 08h for the 

master controller and 70h for the slave controller.

Default: 00h

Master Operational Control Word 2 (Interrupt Mask).Following a part reset or ICW 

initialization, the controller enters the fully nested mode of operation. Non-specific EOI 

without rotation is the default. Both rotation mode and specific EOI mode are disabled 

following initialization.

4

X

WO

ICW/OCW select: This bit must be a 1 to select ICW1 and enable the 

ICW2, ICW3, and ICW4 sequence.

3

X

WO

Edge/Level Bank Select (LTIM): Disabled. Replaced by ELCR1 and ELCR2.

2

X

WO

ADI. Ignored for VLV. Should be programmed to 0.

1

X

WO

Single or Cascade (SNGL): Must be programmed to a 0 to indicate two 

controllers operating in cascade mode.

0

X

WO

wICW4 Write Required (IC4): This bit must be programmed to a 1 to indicate that 

ICW4 needs to be programmed.

I/O Register

(Size: 8 bits)

7

4

0

0

0

0

0

0

0

0

0

IVBA

IRL

7:3

X

WO

Interrupt Vector Base Address: Bits [7:3] define the base address in the interrupt 

vector table for the interrupt routines associated with each interrupt request level input.

2:0

X

WO

Interrupt Request Level: When writing ICW2, these bits should all be 0. During an 

interrupt acknowledge cycle, these bits are programmed by the interrupt controller with 

the interrupt to be serviced. This is combined with bits [7:3] to form the interrupt vector 

driven onto the data bus during the second INTA# cycle. The code is a three bit binary 

code: Code Master Interrupt Slave Interrupt 000 IRQ0 IRQ8 001 IRQ1 IRQ9 010 IRQ2 

IRQ10 011 IRQ3 IRQ11 100 IRQ4 IRQ12 101 IRQ5 IRQ13 110 IRQ6 IRQ14 111 IRQ7 

IRQ15

I/O Register

(Size: 8 bits)