Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2170
Datasheet
18.7.1
Capability Registers Length (CAPLENGTH)—Offset 0h
This register is used as an offset to add to register base, to find the beginning of the
Operational Register Space. This register is modified and maintained by BIOS.
Access Method
Default: 80h
18.7.2
Host Controller Interface Version Number (HCIVERSION)—
Offset 2h
This is a two-byte register containing a BCD encoding of the xHCI specification revision
number supported by this host controller. The most significant byte of this register
represents a major revision, and the least significant bit is the minor revision, e.g.
0100h corresponds to xHCI version 1.0. This register is modified and maintained by
BIOS.
Access Method
84B8–84BBh
4
00000000h
84BC–84BFh
4
00000000h
8530–8533h
4
00000000h
8538–853Bh
4
00000000h
Table 211.
Summary of USB xHCI Memory Mapped I/O Registers—MBAR (Continued)
Offset
Size
(Bytes)
Register Name (Register Symbol)
Default Value
Type:
Memory Mapped I/O Register
(Size: 8 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
7
4
0
1
0
0
0
0
0
0
0
CA
PLE
N
GTH
Bit
Range
Default &
Access
Field Name (ID): Description
7:0
80h
RW/L
Capability Registers Length (CAPLENGTH):
This field is used as an offset to add to
register base, to find the beginning of the Operational Register Space.
Power Well:
Core
Type:
Memory Mapped I/O Register
(Size: 16 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h