Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
SIO - I
2
C Interface
Intel
®
Atom™ Processor E3800 Product Family
3820
Datasheet
26.2
Features
26.2.1
I
2
C Protocol
The I
2
C bus is a two-wire serial interface, consisting of a serial data line and a serial
clock. These wires carry information between the devices connected to the bus. Each
device is recognized by a unique address and can operate as either a “transmitter” or
“receiver,” depending on the function of the device. Devices are considered slaves when
performing data transfers, as the SoC will always be a Master. A master is a device
which initiates a data transfer on the bus and generates the clock signals to permit that
transfer. At that time, any device addressed is considered a slave.
device is recognized by a unique address and can operate as either a “transmitter” or
“receiver,” depending on the function of the device. Devices are considered slaves when
performing data transfers, as the SoC will always be a Master. A master is a device
which initiates a data transfer on the bus and generates the clock signals to permit that
transfer. At that time, any device addressed is considered a slave.
•
The SoC is always the I
2
C master; and it supports multi-master mode.
•
The SoC can support clock stretching by slave devices.
•
The SIO_I2Cx_DATA line is a bidirectional signal and changes only while the
SIO_I2Cx_CLK line is low, except for STOP, START, and RESTART conditions.
SIO_I2Cx_CLK line is low, except for STOP, START, and RESTART conditions.
•
The output drivers are open-drain or open-collector to perform wire-AND functions
on the bus.
on the bus.
•
The maximum number of devices on the bus is limited by the maximum
capacitance specification of 400 pF
capacitance specification of 400 pF
•
for details.
•
Data is transmitted in byte packages.
26.2.2
I
2
C Modes of Operation
The I
2
C module can operate in the following modes:
•
Standard mode (with a bit rate up to 100 Kb/s)
•
Fast mode (with a bit rate up to 400 Kb/s)
•
Fast-mode Plus (Fm+, with a bit rate up to 1 Mb/s)
•
High-speed mode (Hs-mode, with a bit rate up to 3.4 Mb/s)
Note:
Higher speeds require tuning of the analog buffers. Please work with your BIOS vendor
to incorporate.
to incorporate.
The I
2
C can communicate with devices only using these modes as long as they are
attached to the bus. Additionally, high speed mode, fast mode plus and fast mode
devices are downward compatible.
devices are downward compatible.
•
High-speed mode devices can communicate with fast mode and standard mode
devices in a mixed speed bus system.
devices in a mixed speed bus system.
•
Fast mode devices can communicate with standard mode devices in a 0–100 Kb/s
I
I
2
C bus system.