Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4021
26.13.48 General Purpose Register (GENERAL)—Offset 808h
Access Method
Default: 55000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:24, F:4] + 10h
31
28
24
20
16
12
8
4
0
0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
sd
a_
m
u
x_
se
l
sd
a_sig
n
al_state
sc
l_
m
u
x_
se
l
sc
l_sig
n
al_state
sd
a_rd_p
re
_
d
riv
e
sd
a_rd_p
ost
_
d
riv
e
sc
l_rd_p
re
_
d
riv
e
sc
l_rd_post
_
driv
e
Re
se
rv
ed
i2c
_
fi
x_ctrl_1680
i2c
_
fi
x_ctrl_0770
i2c
_
fi
x_ctrl_1699
i2c
_
374798_fix_dis
able
i2c
_
374609_fix_dis
able
i2c
_
tx
_lastb
yte_flag
re
se
rv
ed
Bit
Range
Default &
Access
Field Name (ID): Description
31
0h
RW
sda_mux_sel:
Reserved.
30
1h
RW
sda_signal_state:
Reserved.
29
0h
RW
scl_mux_sel:
Reserved.
28
1h
RW
scl_signal_state:
Reserved.
27
0h
RO
sda_rd_pre_drive:
Reserved.
26
1h
RO
sda_rd_post_drive:
Reserved.
25
0h
RO
scl_rd_pre_drive:
Reserved.
24
1h
RO
scl_rd_post_drive:
Reserved.
23:10
0h
RO
Reserved:
Reserved
9
0h
RW
i2c_fix_ctrl_1680:
Control port to enable fix 9000521680,Generation of STOP
condition without data transfer
8
0h
RW
i2c_fix_ctrl_0770:
Control port to enable fix 9000530770,Stop generating DMA
requests during Tx FIFO flush conditions
7
0h
RW
i2c_fix_ctrl_1699:
Control port to enable fix 9000481699,Rx data is pushed to Rx
FIFO only after Tx FIFO is not-empty
6
0h
RW
i2c_374798_fix_disable:
chicken bit for Fix for NACK bug (HSD # 374798)
5
0h
RW
i2c_374609_fix_disable:
chicken bit for Fix for NACK bug (HSD # 374609)