Intel N2820 FH8065301616603 Data Sheet

1160

Datasheet

The key features of various blocks are as follows:

•

LPC Interface
— Supports Low Pin Count (LPC) 1.1 Specification
— No support for DMA or bus mastering
— Supports Trusted Platform Module (TPM) 1.2

•

General Purpose Input Output
— Legacy control interface for processor GPIOs
— I/O mapped registers

•

8259 Programmable Interrupt Controller
— Legacy interrupt support
— 15 total interrupts through two cascaded controllers
— I/O mapped registers

•

I/O Advanced Programmable Interrupt Controller
— Legacy-free interrupt support
— 87 total interrupts
— Memory mapped registers

•

8254
— Legacy timer support
— Three timers with fixed uses: System Timer, Refresh Request Signal and 

Speaker Tone

— I/O mapped registers

•

HPET - High Performance Event Timers
— Legacy-free timer support
— Three timers and one counter
— Memory mapped registers

•

Real-Time Clock (RTC)
— 242 byte RAM backed by battery (also known as CMOS RAM)
— Can generate wake/interrupt when time matches programmed value
— I/O and indexed registers

ILB_NMI

I

TBD

Non-Maskable Interrupt: This is an NMI event indication into the 

processor. 
This signal is multiplexed and may be used by other functions.