Intel N2820 FH8065301616603 Data Sheet

1164

Datasheet

Miscellaneous Control

Default: 00000000h

2:0

011b

RW

SCIS: SCI IRQ Select (SCIS): Specifies on which IRQ SCI will rout to. If not using APIC, 

SCI must be routed to IRQ9-11 , and that interrupt is not sharable with SERIRQ, but is 

shareable with other interrupts. If using APIC, SCI can be mapped to IRQ20-23, and can 

be shared with other interrupts. When the interrupt is mapped to APIC interrupts 9, 10 

or 11, APIC must be programmed for active-high reception. When the interrupt is 

mapped to APIC interrupts 20 through 23, APIC must be programmed for active-low 

reception.

Type: Memory Mapped I/O Register

(Size: 32 bits)

ILB_BASE_ADDRESS Type: PCI Configuration Register (Size: 32 

bits)
ILB_BASE_ADDRESS Reference: [B:0, D:31, F:0] + 50h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R

SVD0

DR

TC

D8

2

5

9

D8

2

5

4

AME

31:4

0b

RO

RSVD0: Reserved

3

0b

RW

DRTC: Disable RTC (DRTC): When set, decodes to the RTC will be disabled, and the 

accesses instead will be sent to LPC. This allows testing to determine whether these 

functions are needed for XP and Vista 'EDS Note: Do not include this field in the EDS.

2

0b

RW

D8259: Disable 8259 (D8259): When set, decodes to the 8259 will be disabled, and the 

accesses instead will be sent to LPC. This allows testing to determine whether these 

functions are needed for XP and Vista 'EDS Note: Do not include this field in the EDS.

1

0b

RW

D8254: Disable 8254 (D8254): When set, decodes to the 8254 will be disabled, and the 

accesses instead will be sent to LPC. This allows testing to determine whether these 

functions are needed for XP and Vista 'EDS Note: Do not include this field in the EDS.

0

0b

RW

AME: Alt Access Mode is a mode that enables host reading some WO registers . 1. Read 

8254 (legacy timers) indirect WO registers 2. Read 8259 (legacy interrupt controller) 

indirect WO registers 3. Read port 0x70 - port 0x70 includes the RTC memory address 

[6:0] and the NMI enable bit [7]