Intel N2820 FH8065301616603 Data Sheet

Product codes
FH8065301616603
Page of 1294
Datasheet
1243
PCU – iLB – 8254 Timers
27.4
Register Map
27.5
IO Mapped Registers
The IO ports listed in 
 have multiple register functions depending on the 
current programmed state of the 8254. The port numbers referenced in the register 
descriptions following 
 is one possible combination but not the only one.
Table 188.
Register Aliases
Port
Alias
Register Name
Default Value
Access
40h
50h
Counter 0 Interval Time Status Byte Format (C0TS)
0xxxxxxxb
RO
Counter 0 Counter Access Port Register (C0AP)
Undefined
RW
41h
51h
Counter 1 Interval Time Status Byte Format (C1TS)
0xxxxxxxb
RO
Counter 1 Counter Access Port Register (C1AP)
Undefined
RW
42h
52h
Counter 2 Interval Time Status Byte Format (C2TS)
0xxxxxxxb
RO
Counter 2 Counter Access Port Register (C2AP)
Undefined
RW
43h
-
Timer Control Word Register (TCW)
Undefined
WO
Read Back Command (RBC)
xxxxxxx0b
WO
Counter Latch Command (CLC)
xxxx0000b
WO