Intel N2820 FH8065301616603 Data Sheet
Product codes
FH8065301616603
PCU - Power Management Controller (PMC)
990
Datasheet
20.5.1
PRSTS - Power and Reset Status (PRSTS)—Offset 0h
Bits in this register only need to be valid for reading when the Main power well is up.
However, since some of the events may initially be detected while the Main power well
is down, they are marked as suspend well bits. All suspend well bits in this register are
reset by global reset#.
Access Method
Default: 00000000h
ACh
4
00000000h
B0h
4
00000000h
B4h
4
00000000h
B8h
4
00000000h
BCh
4
00000000h
C0h
4
00000000h
C4h
4
00000000h
C8h
4
00000000h
CCh
4
00000000h
D0h
4
00000000h
D4h
4
00000000h
D8h
4
00000000h
DCh
4
00000000h
Table 150.
Summary of PCU iLB PMC Memory Mapped I/O Registers—
PMC_BASE_ADDRESS (Continued)
Offset
Size
Register ID—Description
Default
Value
Type: Memory Mapped I/O Register
(Size: 32 bits)
PMC_BASE_ADDRESS Type: PCI Configuration Register (Size:
32 bits)
PMC_BASE_ADDRESS Reference: [B:0, D:31, F:0] + 44h
PMC_BASE_ADDRESS Reference: [B:0, D:31, F:0] + 44h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
pm
c_
pr
o
d
id
pmc_re
vid
pm
c_w
d
t_s
ts
re
se
rv
ed
co
de
_cop
ied
_
sts
re
se
rv
ed
1
cod
e_lo
ad_to
pmc_op
_sts
se
c_g
b
lrs
t_sts
se
c_
w
d
t_
st
s
wo
l_
ov
r_
w
k_
st
s
pmc_ho
st_w
ak
e_
sts
re
se
rv
ed
2
Bit
Range
Default &
Access
Description
31:24
0b
RO
Power Management Controller Product ID (PMC_PRODID) (pmc_prodid): This
field communicates the Product Family of the power management functionality