Motorola Espresso Maker MC68340 User Manual
1- 8
MC68340 USER’S MANUAL
MOTOROLA
Each communication channel is completely independent. Data formats can be 5, 6, 7, or 8
bits with even, odd, or no parity and stop bits up to 2 in 1/16 increments. Four-byte receive
buffers and two-byte transmit buffers minimize CPU service calls. A wide variety of error
detection and maskable interrupt capability is provided on each channel. Full-duplex,
autoecho loopback, local loopback, and remote loopback modes can be selected.
Multidrop applications are supported.
bits with even, odd, or no parity and stop bits up to 2 in 1/16 increments. Four-byte receive
buffers and two-byte transmit buffers minimize CPU service calls. A wide variety of error
detection and maskable interrupt capability is provided on each channel. Full-duplex,
autoecho loopback, local loopback, and remote loopback modes can be selected.
Multidrop applications are supported.
A 3.6864-MHz crystal drives the baud rate generators. Each transmit and receive channel
can be programmed for a different baud rate, or an external 1
can be programmed for a different baud rate, or an external 1
×
and 16
×
clock input can be
selected. Full modem support is provided with separate request-to-send (RTS) and clear-
to-send (CTS) signals for each channel. One channel also provides service request
signals. The two serial ports can sustain rates of 9.8 Mbps with a 25-MHz system clock in
1
to-send (CTS) signals for each channel. One channel also provides service request
signals. The two serial ports can sustain rates of 9.8 Mbps with a 25-MHz system clock in
1
×
mode, 612 kbps in 16
×
mode (6.5 Mbps and 410 kbps
@
16.78 MHz).
1.3.4 Timer Modules
Timers and counters are used in a system to monitor elapsed time, generate waveforms,
measure signals, keep time-of-day clocks, initiate DRAM refresh cycles, count events, and
provide “time slices” to ensure that no task dominates the activity of the processor. A
counter that counts clock pulses makes a timer, which is most useful when it causes
certain actions to occur in response to reaching desired counts.
measure signals, keep time-of-day clocks, initiate DRAM refresh cycles, count events, and
provide “time slices” to ensure that no task dominates the activity of the processor. A
counter that counts clock pulses makes a timer, which is most useful when it causes
certain actions to occur in response to reaching desired counts.
The MC68340 has two, identical, versatile, on-chip counter/timers as well as a simple
timer in the SIM40. These general-purpose counter/timers can be used for precisely timed
events without the errors to which software-based counters and timers are susceptible—
e.g., errors caused by dynamic memory refreshing, DMA cycle steals, and interrupt
servicing. The programmable timer operating modes are input capture, output compare,
square-wave generation, variable duty-cycle square-wave generation, variable-width
single-shot pulse generation, event counting, period measurement, and pulse-width
measurement.
timer in the SIM40. These general-purpose counter/timers can be used for precisely timed
events without the errors to which software-based counters and timers are susceptible—
e.g., errors caused by dynamic memory refreshing, DMA cycle steals, and interrupt
servicing. The programmable timer operating modes are input capture, output compare,
square-wave generation, variable duty-cycle square-wave generation, variable-width
single-shot pulse generation, event counting, period measurement, and pulse-width
measurement.
Each timer consists of a 16-bit countdown counter with an 8-bit countdown prescaler for a
composite 24-bit resolution. The two timers can be externally cascaded for a maximum
count width of 48 bits. The counter/timer can be clocked by the internal system clock
generated by the SIM40 (
composite 24-bit resolution. The two timers can be externally cascaded for a maximum
count width of 48 bits. The counter/timer can be clocked by the internal system clock
generated by the SIM40 (
÷
2) or by an external clock input. Either the processor or external
stimuli can trigger the starting and stopping of the counter. When a counter reaches a
predetermined value, either an external output signal can be driven, or an interrupt can be
made to the CPU32. The finest resolution of the timer is 80 ns with a 25-MHz system
clock (125 ns
predetermined value, either an external output signal can be driven, or an interrupt can be
made to the CPU32. The finest resolution of the timer is 80 ns with a 25-MHz system
clock (125 ns
@
16.78 MHz).
1.4 POWER CONSUMPTION MANAGEMENT
The MC68340 is very power efficient due to its advanced 0.8-
µ
HCMOS process
technology and its static logic design. The resulting power consumption is typically
900 mW in full operation
900 mW in full operation
@
25 MHz (650 mW
@
16.78 MHz)—far less than the
comparable discrete component implementation the MC68340 can replace. For
applications employing reduced voltage operation, selection of the MC68340V, which
applications employing reduced voltage operation, selection of the MC68340V, which
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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