Infineon 1024MB, 800MHz, DDR II, PC6400, CL6 HYS64T128000EU-2.5C2 User Manual

Product codes
HYS64T128000EU-2.5C2
Page of 41
HYS[64/72]T512020EU–[25F/2.5/3S]–A
Unbuffered DDR2 SDRAM Modules
 Internet Data Sheet
Rev. 1.0, 2008-06
32
06112008-YHWK-B105
TABLE 20
HYS[64/72]T512020EU-3S-A
Product Type
HYS64T512020EU–3S–A
HYS72T512020EU–3S–A
Organization
4 GByte
4 GByte
×64
×72
2 Ranks (
×8)
2 Ranks (
×8)
Label Code
PC2–5300U–555
PC2–5300E–555
JEDEC SPD Revision
Rev. 1.2
Rev. 1.2
Byte#
Description
HEX
HEX
0
Programmed SPD Bytes in EEPROM
80
80
1
Total number of Bytes in EEPROM
08
08
2
Memory Type  (DDR2)
08
08
3
Number of Row Addresses
0F
0F
4
Number of Column Addresses
0A
0A
5
DIMM Rank and Stacking Information
61
61
6
Data Width
40
48
7
Not used
00
00
8
Interface Voltage Level
05
05
9
t
CK
 @ CL
MAX
 (Byte 18) [ns]
30
30
10
t
AC
 SDRAM @ CL
MAX
 (Byte 18) [ns]
45
45
11
Error Correction Support (non-ECC, ECC)
00
02
12
Refresh Rate and Type
82
82
13
Primary SDRAM Width
08
08
14
Error Checking SDRAM Width
00
08
15
Not used
00
00
16
Burst Length Supported
0C
0C
17
Number of Banks on SDRAM Device
08
08
18
Supported CAS Latencies
38
38
19
DIMM Mechanical Characteristics
01
01
20
DIMM Type Information
02
02
21
DIMM Attributes
00
00
22
Component Attributes
07
07
23
t
CK
 @ CL
MAX
 -1 (Byte 18) [ns]
3D
3D
24
t
AC
 SDRAM @ CL
MAX
 -1 [ns]
50
50
25
t
CK
 @ CL
MAX
 -2 (Byte 18) [ns]
50
50
26
t
AC
 SDRAM @ CL
MAX
 -2 [ns]
60
60
27
t
RP.MIN
 [ns]
3C
3C
28
t
RRD.MIN
 [ns]
1E
1E
29
t
RCD.MIN
 [ns]
3C
3C