Elixir DDR2 2GB, RAM, SO-DIMM, 667MHz M2N2G64TU8HD5B-3C User Manual
Product codes
M2N2G64TU8HD5B-3C
M2N1G64TUH8D4F / M2N2G64TU8HD4B / M2N1G64TUH8D5F / M2N2G64TU8HD5B
M2N1G64TUH8D6F / M2N2G64TU8HD6B
1GB: 128M x 64 / 2GB: 256M x 64
Unbuffered DDR2 SO-DIMM
REV 1.1
14
07/2008
© NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Operating, Standby, and Refresh Currents
T
CASE
= 0 °C ~ 85 °C; V
DDQ
= V
DD
= 1.8V ± 0.1V [2GB, 2 Ranks, 128M x 8 DDR2 SDRAMs]
Symbol
Parameter/Condition
PC2-5300
(-3C)
PC2-6400
(-AC)
Unit
IDD0
Operating Current: one bank; active/precharge; t
RC
= t
RC (MIN)
; t
CK
= t
CK (MIN)
;
DQ, DM, and DQS inputs changing twice per clock cycle; address and
control inputs changing once per clock cycle
1379
1556
mA
IDD1
Operating Current: one bank; active/read/precharge; Burst = 4; t
RC
= t
RC
(MIN)
; CL= 4; t
CK
= t
CK (MIN)
; I
OUT
= 0mA; address and control inputs changing
once per clock cycle
1293
1447
mA
IDD2P
Precharge Power-Down Standby Current: all banks idle; power-down
mode; CKE
V
IL (MAX)
; t
CK
= t
CK (MIN)
176
176
mA
IDD2Q
Precharge quiet standby current
771
840
mA
IDD2N
Idle Standby Current: CS
V
IH (MIN)
; all banks idle; CKE
V
IH (MIN)
; t
CK
= t
CK
(MIN)
; address and control inputs changing once per clock cycle
1115
1252
mA
IDD3PF
Active Power-Down Standby Current: one bank active; power-down
mode; CKE
V
IL (MAX)
; t
CK
= t
CK (MIN)
; MRS(12)=0
524
553
mA
IDD3PS
Active Power-Down Standby Current: one bank active; power-down
mode; CKE
V
IL (MAX)
; t
CK
= t
CK (MIN)
; MRS(12)=1
231
234
mA
IDD3N
Active Standby Current: one bank; active/precharge; CS
V
IH (MIN)
; CKE
V
IH (MIN)
; t
RC
= t
RAS (MAX)
; t
CK
= t
CK (MIN)
; DQ, DM, and DQS inputs changing
twice per clock cycle; address and control inputs changing once per clock
cycle
989
1086
mA
IDD4R
Operating Current: one bank; Burst = 4; reads; continuous burst; address
and control inputs changing once per clock cycle; DQ and DQS outputs
changing twice per clock cycle; CL = 4; t
CK
= t
CK (MIN)
; I
OUT
= 0mA
1572
1740
mA
IDD4W
Operating Current: one bank; Burst = 4; writes; continuous burst; address
and control inputs changing once per clock cycle; DQ and DQS inputs
changing twice per clock cycle; CL= 4; t
CK
= t
CK (MIN)
1417
1556
mA
IDD5B
Burst Refresh Current: t
RC
= t
RFC (MIN)
2431
2523
mA
IDD6
Self-Refresh Current: CKE
0.2V
194
194
mA
IDD7
Operating Current: four bank; four bank interleaving with BL = 4, address
and control inputs randomly changing; 50% of data changing at every
transfer; t
RC
= t
RC (min)
; I
OUT
= 0mA.
2593
2991
mA
Note: Module IDD was calculated from component IDD. It may differ from the actual measurement.