SDI Technologies SDIO Card User Manual
©Copyright 2000-2007 SD Card Association
SDIO Simplified Specification Version 2.00
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4.8
Data Transfer Block Sizes
SDIO cards may transfer data in either a multi-byte (1 to 512 bytes) or an optional block format, while the SD
memory cards are fixed in the block transfer mode. The SD Physical Specification limits the block size for data
transfer to powers of 2 (i.e. 512, 1024, 2048) unless using partial read and write. The SDIO Specification allows
any block size from 1 byte to 2048 bytes in order to accommodate the various natural block sizes for I/O
functions. Note that an SDIO card function may define a maximum block size or byte count in the CIS that is
smaller than the maximum values described above.
memory cards are fixed in the block transfer mode. The SD Physical Specification limits the block size for data
transfer to powers of 2 (i.e. 512, 1024, 2048) unless using partial read and write. The SDIO Specification allows
any block size from 1 byte to 2048 bytes in order to accommodate the various natural block sizes for I/O
functions. Note that an SDIO card function may define a maximum block size or byte count in the CIS that is
smaller than the maximum values described above.
4.9 Data
Transfer
Abort
A host communicating with a SD memory card uses CMD12 to abort the transfer of read or write data to/from the
card. For an SDIO card, CMD12 abort is replaced by a write to the ASx bits in the CCCR. Normally, the abort is
used to stop an infinite block transfer (block count=0). If an exact number of blocks are to be transferred, it is
recommended that the host issue a block command with the correct block count, rather than using an infinite
count and aborting the data at the correct time.
4.9.1 Read
Abort
The host may issue an I/O abort by writing to the CCCR at any time during I/O extended read operation. The
data transmission stops 2 clocks cycles after the end bit of the I/O abort command, even If the card has already
begun transferring an unwanted data block while the host is issuing the abort.
data transmission stops 2 clocks cycles after the end bit of the I/O abort command, even If the card has already
begun transferring an unwanted data block while the host is issuing the abort.
The rest of this section is not included in the Simplified Specification.
4.9.2 Write
Abort
The host may issue an I/O abort by writing to the CCCR at any time between data blocks during I/O extended
write operation. In this case, the final block transfer (including the CRC response from the card) shall have been
completed. This requires that the end bit of the I/O abort command should appear a maximum of two clocks
before the end bit of the CRC response to the last data block. Note that the I/O abort command may be sent any
time after the CRC response to the last data block. The host shall not abort in the middle of a write block. After
the I/O abort is sent to the card, the card signals ‘Busy’ (by pulling DAT[0] line to ‘0’) until it has finished
processing the last transferred data block. During that Busy period, the host may release the bus by writing to
the CCCR BR bit. There exist some special cases when the abort is issued near the end of the CRC response to
a write multiple command.
write operation. In this case, the final block transfer (including the CRC response from the card) shall have been
completed. This requires that the end bit of the I/O abort command should appear a maximum of two clocks
before the end bit of the CRC response to the last data block. Note that the I/O abort command may be sent any
time after the CRC response to the last data block. The host shall not abort in the middle of a write block. After
the I/O abort is sent to the card, the card signals ‘Busy’ (by pulling DAT[0] line to ‘0’) until it has finished
processing the last transferred data block. During that Busy period, the host may release the bus by writing to
the CCCR BR bit. There exist some special cases when the abort is issued near the end of the CRC response to
a write multiple command.
The rest of this section is not included in the Simplified Specification.
4.10 Changes to SD Memory Fixed Registers
The SD Physical Specification Version 1.01 defines 7 fixed card registers. They are:
1.
OCR Register (32 bits)
2. CID Register (128 bits)
3.
CSD Register (128 bits)
4. RCA Register (16 bits)
5.
DSR Register (16 bits, optional)
6.
SCR Register (64 bits)
7.
SD_CARD_STATUS (512 bits)
In addition, within an SD memory card there is a status register whose value is returned to the host in the form of
several responses (i.e. the R1b response). An SDIO only card eliminates some registers and changes some of
the bits in the remaining registers. The description of these register changes follows: