Rockwell SoniCrafter BT8960 User Manual

Bt8960

 N8960DSB

The reset input (RST) is an active-low input that places the transceiver in an inac-
tive state by setting the mode bit (0) in the Global Modes and Status Register
[global_modes; 0x00]. An internal supply monitor circuit ensures that the trans-
ceiver will be in an inactive state upon initial application of power to the chip.

The Bt8960 has many directly addressable registers. These registers include con-
trol and monitoring functions. Write operations to undefined registers will have
unpredictable effects. Read operations from undefined registers will have unde-
fined results.

Eight timers are integrated into the Bt8960 to control the various on-chip meters
and to aid the microcomputer in stepping through the events of the startup
sequence. 

The structure of each timer includes down counter, zero detect logic, and con-

trol circuitry, which determines when the counter is reloaded or decremented.

For each of the eight timers, there is a 2-byte timer interval register that deter-

mines the value from which the timer decrements. There are three 8-bit registers:
the  Timer Restart Register [timer_restart; 0x0C], the Timer Enable Register
[timer_enable; 0x0D], and the Timer Continuous Mode Register
[timer_continuous; 0x0E]. These registers control the operation of the timers.
Each bit of the 8-bit registers corresponds to a timer. Each logic-high bit in
timer_restart acts as an event that causes the corresponding timer to reload. Each
logic-high bit in timer_enable acts to enable the corresponding timer. Each
logic-high bit in timer_continuous acts to reload the counter after timing out.

Each counter is loaded with the value in its interval register. The counter dec-

rements until it reaches zero. Upon reaching zero, an interrupt is generated if
enabled by the Interrupt Mask Low Register [mask_low_reg, mask_high_reg;
0x02, 0x03]. The interrupt is edge-triggered so that only one interrupt will be
caused by a single time out.