Renesas Stereo System SH7709S User Manual

Rev. 5.00, 09/03, page 141 of 760

Bit 3—DEI3 Interrupt Request (DEI3R): Indicates whether a DEI3 (DMAC) interrupt request
has been generated.

0

DEI3 interrupt request not generated

(Initial value)

1

DEI3 interrupt request generated

Bit 2—DEI2 Interrupt Request (DEI2R): Indicates whether a DEI2 (DMAC) interrupt request
has been generated.

0

DEI2 interrupt request not generated

(Initial value)

1

DEI2 interrupt request generated

Bit 1—DEI1 Interrupt Request (DEI1R): Indicates whether a DEI1 (DMAC) interrupt request
has been generated.

0

DEI1 interrupt request not generated

(Initial value)

1

DEI1 interrupt request generated

Bit 0—DEI0 Interrupt Request (DEI0R): Indicates whether a DEI0 (DMAC) interrupt request
has been generated.

0

DEI0 interrupt request not generated

(Initial value)

1

DEI0 interrupt request generated

IRR2 is an 8-bit read-only register that indicates whether an A/D converter or SCIF interrupt
request has been generated. This register is initialized to H'00 by a power-on reset or manual reset,
but is not initialized in standby mode.

Bit:

7

6

5

4

3

2

1

0

—

—

—

ADIR

TXI2R

BRI2R

RXI2R

ERI2R

Initial  value:

0

0

0

0

0

0

0

0

R/W:

R

R

R

R

R

R

R

R