Renesas Stereo System SH7709S User Manual
Rev. 5.00, 09/03, page 590 of 760
19.3.2
Port B Data Register (PBDR)
Bit:
7
6
5
4
3
2
1
0
PB7DT
PB6DT
PB5DT
PB4DT
PB3DT
PB2DT
PB1DT
PB0DT
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The port B data register (PBDR) is an 8-bit readable/writable register that stores data for pins
PTB7 to PTB0. Bits PB7DT to PB0DT correspond to pins PTB7 to PTB0. When the pin function
is general output port, if the port is read the value of the corresponding PBDR bit is returned
directly. When the function is general input port, if the port is read the corresponding pin level is
read. Table 19.4 shows the function of PBDR.
PTB7 to PTB0. Bits PB7DT to PB0DT correspond to pins PTB7 to PTB0. When the pin function
is general output port, if the port is read the value of the corresponding PBDR bit is returned
directly. When the function is general input port, if the port is read the corresponding pin level is
read. Table 19.4 shows the function of PBDR.
PBDR is initialized to H'00 by a power-on reset. It retains its previous value in standby mode and
sleep mode, and in a manual reset.
sleep mode, and in a manual reset.
Table 19.4
Port B Data Register (PBDR) Read/Write Operations
PBnMD1
PBnMD0
Pin State
Read
Write
0
0
Other function
(See table 18.1)
(See table 18.1)
PBDR value
Value is written to PBDR, but does not
affect pin state
affect pin state
1
Output
PBDR value
Write value is output from pin
1
0
Input (Pull-up
MOS on)
MOS on)
Pin state
Value is written to PBDR, but does not
affect pin state
affect pin state
1
Input (Pull-up
MOS off)
MOS off)
Pin state
Value is written to PBDR, but does not
affect pin state
affect pin state
(n = 7 to 0)