Renesas M32R-FPU User Manual

3

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M32R-FPU Software Manual (Rev.1.01)

DSP fucntion instruction

Multiply

accumulator = ( ( signed )  Rsrc1 * ( signed short )  Rsrc2  );

MULWLO multiplies the 32 bits of Rsrc1 and the low-order 16 bits of Rsrc2, and stores the

result in the accumulator.

The LSB of the multiplication result is aligned with the LSB of the accumulator, and the portion

corresponding to bits 0 through 15 of the accumulator is sign extended. The 32 bits of Rsrc1 and

low-order 16 bits of Rsrc2 are treated as signed values.

The condition bit (C) is unchanged.

None

Rsrc1

Rsrc2

x

0

15 16

31

0

15 16

31 32

47 48

63

Value in accumulator after the
execution of the MULWLO instruction

Sign extension

low-order 16 bits

32 bits

INSTRUCTIONS

3.2 Instruction description