Renesas M32R-FPU User Manual

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M32R-FPU Software Manual (Rev.1.01)

INSTRUCTIONS

3.2 Instruction description

Floating-point multiply and add

Rdest = Rdest + Rsrc1 * Rsrc2 ;

This instruction is executed in the following 2 steps.

● 

Step 1

Multiply the floating-point single precision value stored in Rsrc1 by the floating-point single

precision value stored in Rsrc2.

The multiplication result is rounded toward 0 regardless of the value in the RM field of FPSR.

● 

Step 2

Add the result of Step 1 (the rounded value) and the floating-point single precision value stored

in Rdest. The result is rounded according to the RM field of FPSR.

The result of this operation is stored in Rdest. Exceptions are determined in both Step 1 and

Step 2. The DN bit of FPSR handles the conversion of denormalized numbers. The condition bit

(C) remains unchanged.

Floating-Point Exceptions (FPE)

• Unimplemented Operation Exception (UIPL)

• Invalid Operation Exception (IVLD)

• Overflow (OVF)

• Underflow (UDF)

• Inexact Exception (IXCT)

floating-point Instructions