Texas Instruments DEM-DAI3793A User Manual
www.ti.com
A.2
Interfacing to DSPs
DSP
SCKI
BCK
LRCK
DOUT
PCM3793A
AudioInterface
Clock
Manager
ADC
DAC
DAC
DSP
SCKI
BCK
LRCK
DOUT
PCM3793A
AudioInterface
Clock
Manager
ADC
DAC
DAC
Interfacing to DSPs
Refer to the following examples for interfacing the PCM3793A to a digital signal processor (DSP) in either
slave or master mode. To implement master mode, MSTR = 1 of register 84 (54h) enables master mode
operation as discussed in the
slave or master mode. To implement master mode, MSTR = 1 of register 84 (54h) enables master mode
operation as discussed in the
. Insert 5440h to the recommended power-on sequence
after DAC power-up (49h) of PCM3793A, as noted in
Example A-1. Slave Mode Operation
illustrates the proper configuration for slave mode operation.
Figure A-24. Slave Mode Operation
Example A-2. Master Mode Operation
illustrates the correct interface for master mode operation.
Figure A-25. Master Mode Operation
Where:
•
SCKI: Audio clock (256f
S
/ 384f
S
)
•
BCK: Clock for audio transfer (32f
S
/ 48f
S
/ 64f
S
)
•
LRCK: Sampling rate clock (f
S
)
•
DIN: Audio data input for DAC (I
2
S, Left-Justified, Right-Justified, DSP)
•
DOUT: Audio data output from ADC (I
2
S, Left-Justified, Right-Justified, DSP)
98
Reference .csv Files, Interfacing to DSPs, and Package Information
SBAU127 – July 2007