National CP3BT26 User Manual
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214
CP3BT26
28.0 Register Map
Table 82 is a detailed memory map showing the specific
memory address of the memory, I/O ports, and registers.
The table shows the starting address, the size, and a brief
description of each memory block and register. For detailed
information on using these memory locations, see the appli-
cable sections in the data sheet.
memory address of the memory, I/O ports, and registers.
The table shows the starting address, the size, and a brief
description of each memory block and register. For detailed
information on using these memory locations, see the appli-
cable sections in the data sheet.
All addresses not listed in the table are reserved and must
not be read or written. An attempt to access an unlisted ad-
dress will have unpredictable results.
not be read or written. An attempt to access an unlisted ad-
dress will have unpredictable results.
Each byte-wide register occupies a single address and can
be accessed only in a byte-wide transaction. Each word-
wide register occupies two consecutive memory addresses
and can be accessed only in a word-wide transaction. Both
be accessed only in a byte-wide transaction. Each word-
wide register occupies two consecutive memory addresses
and can be accessed only in a word-wide transaction. Both
the byte-wide and word-wide registers reside at word
boundaries (even addresses). Therefore, each byte-wide
register uses only the lowest eight bits of the internal data
bus.
boundaries (even addresses). Therefore, each byte-wide
register uses only the lowest eight bits of the internal data
bus.
Most device registers are read/write registers. However,
some registers are read-only or write-only, as indicated in
the table. An attempt to read a write-only register or to write
a read-only register will have unpredictable results.
some registers are read-only or write-only, as indicated in
the table. An attempt to read a write-only register or to write
a read-only register will have unpredictable results.
When software writes to a register in which one or more bits
are reserved, it must write a zero to each reserved bit unless
indicated otherwise in the description of the register. Read-
ing a reserved bit returns an undefined value.
are reserved, it must write a zero to each reserved bit unless
indicated otherwise in the description of the register. Read-
ing a reserved bit returns an undefined value.
Table 82
Detailed Device Mapping
Register Name
Size
Address
Access
Type
Value After
Reset
Comments
Bluetooth LLC Registers
PLN
Byte
0E F180h
Write-Only
WHITENING_CHANNEL_SELECTION
Byte
0E F181h
Write-Only
SINGLE_FREQUENCY_SELECTION
Byte
0E F182h
Write-Only
LN_BT_CLOCK_0
Byte
0E F198h
Read-Only
LN_BT_CLOCK_1
Byte
0E F199h
Read-Only
LN_BT_CLOCK_2
Byte
0E F19Ah
Read-Only
LN_BT_CLOCK_3
Byte
0E F19Bh
Read-Only
RX_CN
Byte
0E F19Ch
Read-Only
TX_CN
Byte
0E F19Dh
Read-Only
AC_ACCEPTLVL
Word
0E F19Eh
Write-Only
LAP_ACCEPTLVL
Byte
0E F1A0h
Write-Only
RFSYNCH_DELAY
Byte
0E F1A1h
Write-Only
SPI_READ
Word
0E F1A2h
Read-Only
SPI_MODE_CONFIG
Byte
0E F1A4h
Write-Only
M_COUNTER_0
Byte
0E F1A6h
Read/Write
M_COUNTER_1
Byte
0E F1A7h
Read/Write
M_COUNTER_2
Byte
0E F1A8h
Read/Write
N_COUNTER_0
Byte
0E F1AAh
Write-Only
N_COUNTER_1
Byte
0E F1ABh
Write-Only
BT_CLOCK_WR_0
Byte
0E F1ACh
Write-Only
BT_CLOCK_WR_1
Byte
0E F1ADh
Write-Only
BT_CLOCK_WR_2
Byte
0E F1AEh
Write-Only
BT_CLOCK_WR_3
Byte
0E F1AFh
Write-Only