National CP3BT26 User Manual
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258
CP3BT26
30.12
ACCESS.BUS TIMING
Table 89
ACCESS.bus Signals
Symbol Figure
Description
Reference
Min (ns)
Max (ns)
ACCESS.bus Input Signals
t
BUFi
Bus free time between Stop and Start
Condition
Condition
t
SCLhigho
-
t
CSTOsi
SCL setup time
Before Stop Condition
(8 × t
CLK
) - t
SCLri
-
t
CSTRhi
SCL hold time
After Start Condition
(8 × t
CLK
) - t
SCLri
-
t
CSTRsi
SCL setup time
Before Start Condition
(8 × t
CLK
) - t
SCLri
-
t
DHCsi
Data High setup time
Before SCL Rising Edge
(RE)
(RE)
2 × t
CLK
-
t
DLCsi
Data Low setup time
Before SCL RE
2 × t
CLK
-
t
SCLfi
SCL signal rise time
-
300
t
SCLri
SCL signal fall time
-
1000
t
SCLlowi
SCL low time
After SCL Falling Edge
(FE)
(FE)
16 × t
CLK
-
t
SCLhighi
SCL high time
After SCL RE
16 × t
CLK
-
t
SDAri
SDA signal rise time
-
1000
t
SDAfl
SDA signal fall time
-
300
t
SDAhi
SDA hold time
After SCL FE
0
-
t
SDAsi
SDA setup time
Before SCL RE
2 × t
CLK
-
ACCESS.bus Output Signals
t
BUFo
Bus free time between Stop and Start
Condition
Condition
t
SCLhigho
t
CSTOso
SCL setup time
Before Stop Condition
t
SCLhigho
t
CSTRho
SCL hold time
After Start Condition
t
SCLhigho
t
CSTRso
SCL setup time
Before Start Condition
t
SCLhigho
t
DHCso
Data High setup time
Before SCL R.E.
t
SCLhigho
-t
SDAro
t
DLCso
Data Low setup time
Before SCL R.E.
t
SCLhigho
-t
SDAfo
t
SCLfo
SCL signal Fall time
300
c
t
SCLro
SCL signal Rise time
-
d
t
SCLlowo
SCL low time
After SCL F.E.
(K × t
CLK
) -1
e
t
SCLhigh
o
SCL high time
After SCL R.E.
(K × t
CLK
) -1
e
t
SDAfo
SDA signal Fall time
300
t
SDAro
SDA signal Rise time
-
t
SDAho
SDA hold time
After SCL F.E.
(7 × t
CLK
) - t
SCLfo
t
SDAvo
SDA valid time
After SCL F.E.
(7 × t
CLK
) + t
RD