IBM Intel Xeon E5506 46M1079 User Manual
Product codes
46M1079
Intel
®
Xeon
®
Processor 5500 Series Datasheet, Volume 1
125
Thermal Specifications
6.3.3
Multi-Domain Commands
The Intel Xeon processor 5500 series does not support multiple domains, but it is
possible that future products will, and the following tables are included as a reference
for domain-specific definitions.
possible that future products will, and the following tables are included as a reference
for domain-specific definitions.
6.3.4
Client Responses
6.3.4.1
Abort FCS
The Client responds with an Abort FCS under the following conditions:
• The decoded command is not understood or not supported on this processor (this
includes good command codes with bad Read Length or Write Length bytes).
• Data is not ready.
• Assured Write FCS (AW FCS) failure. Note that under most circumstances, an
• Assured Write FCS (AW FCS) failure. Note that under most circumstances, an
Assured Write failure will appear as a bad FCS. However, when an originator issues
a poorly formatted command with a miscalculated AW FCS, the client will
intentionally abort the FCS in order to guarantee originator notification.
a poorly formatted command with a miscalculated AW FCS, the client will
intentionally abort the FCS in order to guarantee originator notification.
6.3.4.2
Completion Codes
Some PECI commands respond with a completion code byte. These codes are designed
to communicate the pass/fail status of the command and also provide more detailed
information regarding the class of pass or fail. For all commands listed in
to communicate the pass/fail status of the command and also provide more detailed
information regarding the class of pass or fail. For all commands listed in
that support completion codes, each command’s completion codes is listed in its
respective section. What follows are some generalizations regarding completion codes.
respective section. What follows are some generalizations regarding completion codes.
An originator that is decoding these commands can apply a simple mask to determine
pass or fail. Bit 7 is always set on a failed command, and is cleared on a passing
command.
pass or fail. Bit 7 is always set on a failed command, and is cleared on a passing
command.
Table 6-25. Domain ID Definition
Domain ID
Domain Number
0b01
0
0b10
1
Table 6-26. Multi-Domain Command Code Reference
Command Name
Domain 0
Code
Domain 1
Code
GetTemp()
0x01
0x02
PCIConfigRd()
0xC1
0xC2
PCIConfigWr()
0xC5
0xC6
MbxSend()
0xD1
0xD2
MbxGet()
0xD5
0xD6
Table 6-27. Completion Code Pass/Fail Mask
0xxx xxxxb
Command passed
1xxx xxxxb
Command failed