Sun Microsystems SME5224AUPA-400 User Manual

Page of 56
DATASHEET
1
SME5224AUPA-400
UltraSPARC
-II CPU Module
400 MHz CPU, 4.0 MB E-Cache
M
ODULE
D
ESCRIPTION
The UltraSPARC™–II, 400 MHz CPU, 4.0 Mbyte module, (SME5224AUPA-400) delivers high performance
computing in a compact design. Based on the UltraSPARC™-II CPU, this module is designed using a small
form factor board with an integrated external cache. It connects to the high bandwidth Ultra™ Port Architec-
ture UPA bus via a high speed sturdy connector. The UltraSPARC™–II, 400 MHz CPU, 4.0 Mbyte module, can
plug into any UPA connector, saving system design costs and reducing the production time for new systems.
Heatsinks are attached to components on the module board. The module board is encased in a plastic shroud.
The purpose of this shroud is to protect the components and channel airflow. Module design is geared
towards ease of upgrade and field support.
Module Features
Module Benefits
Ease of System Design
Small form factor board with integrated external cache
and UPA interface
JTAG boundary scan and performance instrumentation
PCB provides a multi-power plane bypass, reducing
systemboard design requirements
Performance
High performance UltraSPARC™ CPU at 400MHz
Four megabytes of external cache using high speed
register-latch SRAMs
Dedicated high bandwidth bus to processor
Glueless MP Support
Implements the high performance AUPA interface
Supports up to 16 Mbyte of external cache in a
four-way MP system
Simplify System Qualifications by
Complying with Industry and Government
Standards
Backwards compatibility with systems implementing a
UPA interface
Plastic shroud protects components and channels
airflow
Multi-layer PCB controls EMI radiation
Edge connectors and ejectors
Small form factor board encased in a heat resistant
shroud
On-board voltage regulator accepts 2.6 volts for the
Vdd_core; compatible with existing systems
July 1999