Intel Xeon E7450 AD80582QH056003 Data Sheet

Product codes

AD80582QH056003

Electrical Specifications

Intel® Xeon® Processor 7400 Series Datasheet

2.3.2

PLL Power Supply

An on-die PLL filter solution is implemented on the processor. The

CCPLL

input is used

to provide power to the on chip PLL of the processor. Please refer to

Table 2-9

for DC

specifications. Refer to the appropriate platform design guidelines for decoupling and
routing guidelines.

2.4

Voltage Identification (VID)

The Voltage Identification (VID) specification for the processor is defined by the Voltage
Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design
Guidelines. The voltage set by the VID signals is the reference VR output voltage to be
delivered to the processor Vcc pins. VID signals are CMOS outputs. Please refer to

Table 2-11

for the DC specifications for these signals. A voltage range is provided in

Table 2-9

and changes with frequency. The specifications have been set such that one

voltage regulator can operate with all supported frequencies.

Individual processor VID values may be calibrated during manufacturing such that two
devices at the same core frequency may have different default VID settings. This is
reflected by the VID range values provided in

Table 2-3

The processor uses six voltage identification signals, VID[6:1], to support automatic
selection of power supply voltages.

Table 2-3

specifies the voltage level corresponding

to the state of VID[6:1]. A ‘1’ in this table refers to a high voltage level and a ‘0’ refers
to a low voltage level. The definition provided in

Table 2-3

is not related in any way to

previous Intel

Xeon

processors or voltage regulator designs. If the processor socket

is empty (VID[6:1] = 111111), or the voltage regulation circuit cannot supply the
voltage that is requested, the voltage regulator must disable itself. See the Voltage
Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design
Guidelines for further details.

Although the Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down
(EVRD) 11.0 Design Guidelines defines VID [7:0], VID 7 and VID 0 are not used on the
Intel® Xeon® Processor 7400 Series.

The Intel® Xeon® Processor 7400 Series provides the ability to operate while
transitioning to an adjacent VID and its associated processor core voltage (V

). This

will represent a DC shift in the load line. It should be noted that a low-to-high or high-
to-low voltage state change may result in as many VID transitions as necessary to
reach the target core voltage. Transitions above the specified VID are not permitted.

Table 2-9

includes VID step sizes and DC shift ranges. Minimum and maximum voltages

must be maintained as shown in

Table 2-10

and

Table 2-2

The VRM or EVRD utilized must be capable of regulating its output to the value defined
by the new VID. DC specifications for dynamic VID transitions are included in

Table 2-9

and

Table 2-10

, while AC specifications are included in

Table 2-25

. Refer to the Voltage

Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design
Guidelines for further details.

Power source characteristics must be guaranteed to be stable whenever the supply to
the voltage regulator is stable.