Intel E5400 AT80571PG0682ML Data Sheet

10

Datasheet

“Front Side Bus” refers to the interface between the processor and system core logic 

(a.k.a. the chipset components). The FSB is a multiprocessing interface to processors, 

memory, and I/O.

Commonly used terms are explained here for clarification:

• Intel

 dual-core processor E5000 series — Dual core processor in 

the FC-LGA8 package with a 2 MB L2 cache.

• Intel

 dual-core processor E6000 series — Dual core processor in 

the FC-LGA8 package with a 2 MB L2 cache.

• Processor — For this document, the term processor is the generic form of the 

Intel

®

 Pentium

®

 dual-core processor E5000 and E6000 series.

• Voltage Regulator Design Guide — For this document “Voltage Regulator Design 

Guide” may be used in place of: 

— Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design 

• Enhanced Intel

 microarchitecture — A new foundation for Intel

®

 

architecture-based desktop, mobile and mainstream server multi-core processors. 

For additional information refer to: 

http://www.intel.com/technology/architecture/

coremicro/

• Keep-out zone — The area on or near the processor that system design can not 

use. 

• Processor core — Processor die with integrated L2 cache. 
• LGA775 socket — The processors mate with the system board through a surface 

mount, 775-land, LGA socket.

• Integrated heat spreader (IHS) —A component of the processor package used 

to enhance the thermal performance of the package. Component thermal solutions 

interface with the processor at the IHS surface.

• Retention mechanism (RM) — Since the LGA775 socket does not include any 

mechanical features for heatsink attach, a retention mechanism is required. 

Component thermal solutions should attach to the processor using a retention 

mechanism that is independent of the socket.

• FSB (Front Side Bus) — The electrical interface that connects the processor to 

the chipset. Also referred to as the processor system bus or the system bus. All 

memory and I/O transactions as well as interrupt messages pass between the 

processor and chipset over the FSB.

• Storage conditions — Refers to a non-operational state. The processor may be 

installed in a platform, in a tray, or loose. Processors may be sealed in packaging or 

exposed to free air. Under these conditions, processor lands should not be 

connected to any supply voltages, have any I/Os biased, or receive any clocks. 

Upon exposure to “free air”(i.e., unsealed packaging or a device removed from 

packaging material) the processor must be handled in accordance with moisture 

sensitivity labeling (MSL) as indicated on the packaging material.

• Functional operation — Refers to normal operating conditions in which all 

processor specifications, including DC, AC, system bus, signal quality, mechanical 

and thermal are satisfied. 

• Execute Disable Bit — Execute Disable Bit allows memory to be marked as 

executable or non-executable, when combined with a supporting operating system. 

If code attempts to run in non-executable memory the processor raises an error to 

the operating system. This feature can prevent some classes of viruses or worms 

that exploit buffer over run vulnerabilities and can thus help improve the overall