Motorola MPC8260 User Manual
MOTOROLA
Chapter 12. IEEE 1149.1 Test Access Port
12-1
Chapter 12
IEEE 1149.1 Test Access Port
IEEE 1149.1 Test Access Port
120
120
The MPC8260 provides a dedicated user-accessible test access port (TAP) that is fully
compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan
Architecture. Problems associated with testing high-density circuit boards have led to
development of this proposed standard under the sponsorship of the Test Technology
Committee of IEEE and the Joint Test Action Group (JTAG). The MPC8260Õs
implementation supports circuit-board test strategies based on this standard.
compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan
Architecture. Problems associated with testing high-density circuit boards have led to
development of this proposed standard under the sponsorship of the Test Technology
Committee of IEEE and the Joint Test Action Group (JTAG). The MPC8260Õs
implementation supports circuit-board test strategies based on this standard.
The TAP consists of Þve dedicated signal pinsÑa 16-state TAP controller and two test data
registers. A boundary scan register links all device signal pins into a single shift register.
The test logic, which is implemented using static logic design, is independent of the device
system logic. The MPC8260Õs implementation provides the capability to do the following:
registers. A boundary scan register links all device signal pins into a single shift register.
The test logic, which is implemented using static logic design, is independent of the device
system logic. The MPC8260Õs implementation provides the capability to do the following:
¥
Perform boundary scan operations to check circuit-board electrical continuity.
¥
Bypass the MPC8260 for a given circuit-board test by effectively reducing the
boundary scan register to a single cell.
boundary scan register to a single cell.
¥
Sample the MPC8260 system pins during operation and transparently shift out the
result in the boundary-scan register.
result in the boundary-scan register.
¥
Disable the output drive to pins during circuit-board testing.
NOTE
Precautions must be observed to ensure that the IEEE 1149.1-
like test logic does not interfere with nontest operation.
like test logic does not interfere with nontest operation.
12.1 Overview
The MPC8260Õs implementation includes a TAP controller, a 4-bit instruction register, and
two test registers (a 1-bit bypass register and a 475-bit boundary scan register). Figure 12-1
shows an overview of the MPC8260Õs scan chain implementation.
two test registers (a 1-bit bypass register and a 475-bit boundary scan register). Figure 12-1
shows an overview of the MPC8260Õs scan chain implementation.