Motorola MPC8260 User Manual

MOTOROLA

Part  IV.  Communications Processor Module  

Part  IV-iii

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Chapter 33, ÒSerial Peripheral Interface (SPI),Ó describes the serial peripheral 
interface, which allows the MPC8260 to exchange data between other MPC8260 
chips, the MC68360, the MC68302, the M68HC11, and M68HC05 microcontroller 
families, and peripheral devices such as EEPROMs, real-time clocks, A/D 
converters, and ISDN devices. 

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Chapter 34, ÒI2C Controller,Ó describes the MPC8260 implementation of the inter-
integrated circuit (I

2

C¨) controller, which allows data to be exchanged with other 

I

2

C devices, such as microcontrollers, EEPROMs, real-time clock devices, and A/D 

converters.

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Chapter 35, ÒParallel I/O Ports,Ó describes the four general-purpose I/O ports AÐD. 
Each signal in the I/O ports can be conÞgured as a general-purpose I/O signal or as 
a signal dedicated to supporting communications devices, such as SMCs, SCCs. 
MCCs, and FCCs.

This section lists additional reading that provides background for the information in this
manual as well as general information about the PowerPC architecture. 

Supporting documentation for the MPC8260 can be accessed through the world-wide web
at http://www.mot.com/netcomm. This documentation includes technical speciÞcations,
reference materials, and detailed applications notes.

The PowerPC documentation is organized in the following types of documents:

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Programming environments manualsÑThese books provide information about 
resources deÞned by the PowerPC architecture that are common to PowerPC 
processors. There are two versions, one that describes the functionality of the 
combined 32- and 64-bit architecture models and one that describes only the 32-bit 
model. 

Ñ PowerPC Microprocessor Family: The Programming Environments, Rev 1 

(Motorola order #: MPCFPE/AD) 

Ñ PowerPC Microprocessor Family: The Programming Environments for 32-Bit 

Microprocessors, Rev. 1 (Motorola order #: MPCFPE32B/AD)

PowerPC Microprocessor Family: The Bus Interface for 32-Bit Microprocessors 
(Motorola order #: MPCBUSIF/AD) provides a detailed functional description of 
the 60x bus interface, as implemented on the PowerPC 601ª, 603, and 604 family 
of PowerPC microprocessors. This document is intended to help system and chip set 
developers by providing a centralized reference source to identify the bus interface 
presented by the 60x family of PowerPC microprocessors.