Motorola MPC8260 User Manual

MOTOROLA

Chapter 18.  SDMA Channels and IDMA Emulation  

18-5

The CPM can be conÞgured to provide general-purpose DMA functionality through the
SDMA channel. Four general-purpose independent DMA (IDMA) channels are supported.
In this special emulation mode, the user can specify any memory-to-memory or
peripheral-to/from-memory transfers as if using dedicated DMA hardware.

The general-purpose IDMA channels can operate in different user-programmable data
transfer modes. The IDMA can transfer data between any combination of memory and I/O.
In addition, data may be transferred in either byte, half-word, word, double-word or burst
quantities and the source and destination addresses may be odd or even. The most efÞcient
packing algorithms are used in the IDMA transfers. The single-address mode (ßy-by mode)
gives the highest performance, allowing data to be transferred between memory and a
peripheral in a single bus transaction. The chip-select and wait-state generation logic on the
MPC8260 can be used with the IDMA.

The bus bandwidth occupied by the IDMA can be programmed in the IDMA parameter
RAM to achieve maximum system performance.

The IDMA supports two buffer handling modesÑauto buffer and buffer chaining. The auto
buffer mode allows blocks of data to be repeatedly moved from one location to another
without user intervention. The buffer chaining mode allows a chain of blocks to be moved.
The user speciÞes the data movement using BD tables like those used by other peripheral
controllers. The BD tables reside in the dual-port RAM.

Each IDMA has three signals (DREQx, DACKx and DONEx) for peripheral handshaking.

The main IDMA features are as follows:

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Four independent, fully programmable DMA channels

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Dual- or single-address transfers with 32-bit address and 64-bit data capability

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Memory-to-memory, memory-to-peripheral, and peripheral-to-memory modes

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4-Gbyte maximum block length for each buffer

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32-bit address pointers that can be optionally incremented

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Two buffer handling modesÑauto buffer and buffer chaining

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Interrupts are optionally generated for BD transfer completion, external DONE 
assertion, and 

STOP

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IDMA

 command completion.

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Any channel is independently conÞgurable for data transfer from any 60x, local bus 
source to any 60x, local bus destination

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Programmable byte-order conversion is supported independently for each DMA 
channel

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Supports programmable 60x-bus bandwidth usage for system performance 
optimization