Motorola MPC8260 User Manual

MOTOROLA

Chapter 23.  SCC Transparent Mode  

23-5

MPC8260(A) and MPC8260(B) exchange transparent frames and synchronize each other
using RTS and CD. However, CTS is not required because transmission begins at any time.
Thus, RTS is connected directly to the other MPC8260 CD pin. GSMR_H[RSYN] is not
used and transmission and reception from each MPC8260 are independent.

If there is no need to synchronize the transparent controller at a speciÞc point, the user can
ÔfakeÕ synchronization in one of the following ways:

¥

Tie a parallel I/O pin to the CTS and CD lines. Then, after enabling the receiver and 
transmitter, provide a falling edge by manipulating the I/O pin in software.

¥

Enable the receiver and transmitter for the SCC in loopback mode and then change 
GSMR_L[DIAG] to 0b00 while the transmitter and receiver and enabled.

A transparent-mode SCC using the time-slot assigner can synchronize either on a user-
deÞned inline pattern or by inherent synchronization.

RXD

CD

CLKx

TXD

RTS

CD

RXD

BRGOx

RTS

TXD

CLKx

BRGOx

BRGOx

Last Bit of Frame Data

First Bit of Frame Data

(Output is CLKx Input)

TXD

(Output is RXD Input)

RTS

(Output is CD Input)

or CRC

TxBD[L] = 1 Causes Negation of RTS

CD Lost Condition Terminates Reception of Frame

Notes:

1.  Each MPC8260 generates its own transmit clocks. If the transmit and receive clocks are the same, one MPC8260 

can generate transmit and receive clocks for the other MPC8260. For example, CLKx on MPC8260 (B) could be 
used to clock the transmitter and receiver.

2. 

CTS

 should be configured as always asserted in the parallel I/O or connected to ground externally.

3.  The required GSMR conÞgurations are DIAG= 00, CTSS=1, CTSP is a ÒdonÕt careÓ, CDS=1, CDP=0, TTX=1, and 

TRX=1. REVD and TCRC are application-dependent.

4.  The transparent frame contains a CRC if TxBD[TC] is set.