Motorola MPC8260 User Manual

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26-8
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV.  Communications Processor Module
Certain parameter RAM values must be initialized before the SMC is enabled. Other values
are initialized or written by the CP. Once values are initialized, software typically does not
need to update them because activity centers mostly around transmit and receive BDs rather
than parameter RAM. However, note the following:
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Parameter RAM can be read at any time.
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Values that pertain to the SMC transmitter can be written only if SMCMR[TEN] is 
zero or between the 
STOP
 
TRANSMIT
 and 
RESTART
 
TRANSMIT
 commands. 
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Values for the SMC receiver can be written only when SMCMR[REN] is zero, or, if 
the receiver is previously enabled, after an 
ENTER
 
HUNT
 
MODE
 command is issued 
but before the 
CLOSE
 
RXBD
 command is issued and REN is set.
26.2.3.1  SMC Function Code Registers (RFCR/TFCR)
Each SMC channel has four receive buffers (RFCRn) and four transmit buffers (TFCRn).
The function code registers contain the transaction speciÞcation associated with SDMA
channel accesses to external memory. Figure 26-4 shows the register format.
Bit
0
1
2
3
4
5
6
7
Field
GBL
BO
TC2
DTB
Ñ
R/W
R/W
Address
SMC base + 0x04 (RFCR)/SMC base + 0x05 (TFCR)
Figure 26-4. SMC Function Code Registers (RFCR/TFCR)
Table 26-3. RFCR/TFCR Field Descriptions
Bit
Name
Description
0Ð1
Ñ
Reserved, should be cleared.
2
GBL
Global access bit
0 Disable memory snooping
1 Enable memory snooping
3Ð4
BO
Byte ordering. Selects byte ordering of the data buffer. 
00 The DEC/Intel convention (swapped operation or little-endian). The transmission order of bytes 
within a buffer word is opposite of Motorola mode. (32-bit port size memory only).
01 PowerPC little-endian. As data is sent onto the serial line from the buffer, the LSB of the buffer 
double word contains data to be sent earlier than the MSB of the same double word. 
1x Motorola (big-endian) byte ordering (normal operation). As data is sent onto the serial line from the 
buffer, the MSB of the buffer word contains data to be sent earlier than the LSB of the same word.
5
TC2
Transfer code 2. Contains the transfer code value of TC[2], used during this SDMA channel memory 
access. TC[0Ð1] is driven with a 0b11 to identify this SDMA channel access as a DMA-type access.
6
DTB
Data bus indicator.
0 Use 60x bus for SDMA operation.
1 Use local bus for SDMA operation. 
7
Ñ
Reserved, should be cleared.