Motorola MPC8260 User Manual

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MOTOROLA
Chapter 27.  Multi-Channel Controllers (MCCs)  
27-23
Part IV.  Communications Processor Module
The data length and buffer pointer are described as follows:
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Data length. Data length is the number of octets written by the CP into this BDÕs data 
buffer. It is written by the CP when the BD is closed. When this is the last BD in the 
frame (L = 1), the data length contains the total number of frame octets (including 
two or four bytes for CRC). Note that memory allocated for buffers should be not 
smaller than the contents of the maximum receive buffer length register (MRBLR). 
The data length does not include the time stamp.
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Rx buffer pointer. The receive buffer pointer points to the Þrst location of the 
associated data buffer. This value must be equal to 8*n if CHAMR[TS] = 0 and equal 
to 8*n - 4 if CHAMR[TS] = 1 (where n is any integer larger than 0).
27.11.2  Transmit Buffer Descriptor (TxBD)
Figure 27-16 shows the TxBD. 
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Offset + 0
R
Ñ
W
I
L
TC
CM
Ñ
UB
Ñ
PAD
Offset + 2
Data Length
Offset + 4
Tx Data Buffer Pointer
Offset + 6
Figure 27-16. MCC Transmit Buffer Descriptor (TxBD)
Table 27-16. TxBD Field Descriptions 
Bits
Name
Description
0
R
Ready
0 The buffer associated with this BD is not ready for transmission. The user is free to manipulate this 
BD or its associated data buffer. The CP clears this bit after the buffer has been transmitted or after 
an error condition is encountered.
1 The data buffer is ready to be transmitted. The transmission may have begun, but it has not 
completed. The user cannot modify this BD once this bit is set.
1
Ñ
Reserved, should be cleared.
2
W
Wrap (Þnal BD in table)
0 This is not the last BD in the TxBD table. 
1 This is the last BD in the TxBD table. After this buffer is used, the CP receives incoming data into the 
Þrst BD in the table (the BD pointed to by TBASE). The number of TxBDs in this table is 
programmable and is determined the wrap bit.
3
I
Interrupt 
0 No interrupt is generated after this buffer has been serviced.   
1 TXB in the circular interrupt table entry is set when this buffer has been serviced by the MCC. This 
bit can cause an interrupt (if enabled).
4
L
Last 
0 This is not the last buffer in the frame. 
1 This is the last buffer in the current frame.