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Motorola MPC8260 User Manual

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29-56
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV.  Communications Processor Module
Table 29-24 describes AAL0 protocol-speciÞc TCT Þelds.
29.10.2.3.4  VBR Protocol-SpeciÞc TCTE
Figure 29-34 shows the VBR protocol-speciÞc TCTE. 
Table 29-25 describes VBR protocol-speciÞc TCTE Þelds.
Table 29-24. AAL0-Specific TCT Field Descriptions 
Offset
Bits
Name
Description
0x10
0Ð7
Ñ
Reserved, should be cleared. 
8
0
Must be 0. 
9
CR10
CRC-10
0  CRC10 insertion is disabled.
1  CRC10 insertion is enabled.
10
Ñ
Reserved, should be cleared. 
11
ACHC
ATM cell header change
0  Normal operation ATM cell header is taken from AAL0 buffer.
1  VPI/VCI (28 bits) are taken from TCT.
12Ð15
Ñ
Reserved, should be cleared. 
0x12Ð
0x14
Ñ
Ñ
Reserved, should be cleared.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Offset + 0x00
SCR
Offset + 0x02
Burst Tolerance (BT)
Offset + 0x04
Out of Buffer Rate (OOBR)
Offset + 0x06
Sustain Rate Remainder (SRR)
SCR Fraction (SCRF)
Offset + 0x08
Sustain Rate (SR)
Offset + 0x0A
Offset + 0x0C
VBR2
Ñ
Offset + 0x0E-1E
Ñ
Figure 29-34. Transmit Connection Table Extension (TCTE)ÑVBR Protocol-
Specific
Table 29-25. VBR-Specific TCTE Field Descriptions 
Offset
Bits
Name
Description
0x00
Ñ
SCR
Sustain cell rate. Holds the sustain cell rate (in slots) permitted for this channel according to 
the trafÞc contract. To pace the channelÕs sustain cell rate, the APC performs a continuous-
state leaky bucket algorithm (GCRA). 
0x02
Ñ
BT
Burst tolerance. Holds the burst tolerance permitted for this channel according to the trafÞc 
contract. The relationship between the BT and the maximum burst size (MBS) is BT=(MBS-2) 
´ (SCR-PCR) + SCR.
0x04
Ñ
OOBR Out-of-buffer rate. In out of buffer state (when the transmitter tries to open TxBD whose R bit 
is not set) the APC reschedules the current channel according to OOBR rate.