Motorola MPC8260 User Manual
MOTOROLA
Chapter 31. FCC HDLC Controller
31-9
Part IV. Communications Processor Module
31.7 HDLC Receive Buffer Descriptor (RxBD)
The HDLC controller uses the RxBD to report on data received for each buffer. Figure 31-4
shows an example of the RxBD process.
shows an example of the RxBD process.
24-25
CRC
CRC selection
00 16-bit CCITT-CRC (HDLC). X16 + X12 + X5 + 1
01 Reserved
10 32-bit CCITT-CRC (Ethernet and HDLC). X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8
00 16-bit CCITT-CRC (HDLC). X16 + X12 + X5 + 1
01 Reserved
10 32-bit CCITT-CRC (Ethernet and HDLC). X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8
+ X7 + X5 + X4 + X2 + X1 +1
11 Reserved
26Ð31
Ñ
Reserved, should be cleared.
Table 31-6. FPSMR Field Descriptions (Continued)
Bits
Name
Description