Intel 8XC196MC User Manual
8XC196MC, MD, MH USER’S MANUAL
16-4
16.3.1.1
Controlling Access to the OTPROM During Normal Operation
During normal operation, the lock bits in CCB0 control read and write accesses to the OTPROM.
Table 16-2 describes the options. You can program the CCBs using any of the programming
methods.
Table 16-2 describes the options. You can program the CCBs using any of the programming
methods.
Clearing CCB0.6 enables write protection. With write protection enabled, a write attempt causes
the bus controller to cycle through the write sequence, but it does not enable V
the bus controller to cycle through the write sequence, but it does not enable V
PP
or write data to
the OTPROM. This protects the entire OTPROM array from inadvertent or unauthorized pro-
gramming.
gramming.
Clearing CCB0.7 enables read protection and also write protects the security key to protect it
from being overwritten. With read protection enabled, the bus controller will not read from pro-
tected areas of OTPROM. An attempt to load the slave program counter with an external address
causes the device to reset itself. Because the slave program counter can be as much as four bytes
ahead of the CPU program counter, the bus controller might prevent code execution from the last
four bytes of internal memory. The interrupt vectors and CCBs are not read protected because
interrupts can occur even when executing from external memory.
from being overwritten. With read protection enabled, the bus controller will not read from pro-
tected areas of OTPROM. An attempt to load the slave program counter with an external address
causes the device to reset itself. Because the slave program counter can be as much as four bytes
ahead of the CPU program counter, the bus controller might prevent code execution from the last
four bytes of internal memory. The interrupt vectors and CCBs are not read protected because
interrupts can occur even when executing from external memory.
16.3.1.2
Controlling Access to the OTPROM During Programming Modes
For programming modes, three levels of protection are available:
•
prohibit all programming
•
prohibit all programming, but permit authorized ROM dumps
•
permit authorized ROM dumps, auto programming, and slave programming
Table 16-2. Memory Protection for Normal Operating Mode
Read Protect
LOC1 (CCR0.7)
Write Protect
LOC0 (CCR0.6)
Protection Status
1
1
No protection. Run-time programming is permitted, and the entire
OTPROM array can be read.
OTPROM array can be read.
1
0
Write protection only. Run-time programming is disabled, but the
entire OTPROM array can be read.
entire OTPROM array can be read.
0
1
Read protection. Run-time programming is disabled. If program
execution is external, only the interrupt vectors and CCBs can be
read. The security key is write protected.
execution is external, only the interrupt vectors and CCBs can be
read. The security key is write protected.
0
0
Read and write protection. Run-time programming is disabled. If
program execution is external, only the interrupt vectors and CCBs
can be read.
program execution is external, only the interrupt vectors and CCBs
can be read.