Intel 8XC196MC User Manual
8XC196MC, MD, MH USER’S MANUAL
16-22
Figure 16-9 shows the timings of the program word command with a repeated programming pulse
and auto increment. Asserting PALE# latches the command and address on the PBUS. Asserting
PROG# latches the data on the PBUS and starts the programming sequence. The PROG# signal
controls the programming pulse width. (Slave programming mode does not use the PPW regis-
ter.) After the rising edge of PROG#, the routine verifies the contents of the location that was just
programmed and asserts PVER to indicate successful programming. AINC# is optional and can
automatically increment the address for the next location. If you do not use AINC#, you must
send a new program word command to access the next word location.
and auto increment. Asserting PALE# latches the command and address on the PBUS. Asserting
PROG# latches the data on the PBUS and starts the programming sequence. The PROG# signal
controls the programming pulse width. (Slave programming mode does not use the PPW regis-
ter.) After the rising edge of PROG#, the routine verifies the contents of the location that was just
programmed and asserts PVER to indicate successful programming. AINC# is optional and can
automatically increment the address for the next location. If you do not use AINC#, you must
send a new program word command to access the next word location.
Figure 16-9. Program Word Waveform
†
†
RESET#
PBUS
(Ports 3/4)
PALE#
PROG#
PVER
AINC#
ADDR/COMMAND
AVLL
T
DATA1
ADDR1
DATA2
ADDR2
SHLL
T
LLLH
T
LLAX
T
PHPL
T
††
PLPH
T
ILPL
T
ILVH
T
ILIH
T
PHIL
T
PHVL
T
LHPL
T
PLDX
T
DVPL
T
†
††
††
Additional program pulses and verifications.
Measure from falling edge of last PROG# pulse in sequence.
Measure from falling edge of last PROG# pulse in sequence.
Pulse 1
A0121-02