Renesas R5S72641 User Manual
Section 20 Controller Area Network
R01UH0134EJ0400 Rev. 4.00
Page 1037 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
A mask is set by writing a '1' to the corresponding bit position for the mailbox activity to be
masked. At reset all mailbox interrupts are masked.
masked. At reset all mailbox interrupts are masked.
MBIMR1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MBIMR1[15:0]
Bit 15 to 0 — Enable or disable interrupt requests from individual Mailbox-31 to Mailbox-16
respectively.
respectively.
Bit[15:0]: MBIMR1 Description
0
Interrupt Request from IRR1/IRR2/IRR8/IRR9 enabled
1
Interrupt Request from IRR1/IRR2/IRR8/IRR9 disabled (initial value)
MBIMR0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MBIMR0[15:0]
Bit 15 to 0 — Enable or disable interrupt requests from individual Mailbox-15 to Mailbox-0
respectively.
respectively.
Bit[15:0]: MBIMR0 Description
0
Interrupt Request from IRR1/IRR2/IRR8/IRR9 enabled
1
Interrupt Request from IRR1/IRR2/IRR8/IRR9 disabled (initial value)