Renesas R5S72641 User Manual
Section 26 USB 2.0 Host/Function Module
Page 1460 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7 SQSET 0 R/W*
Toggle Bit Set
This bit should be set to 1 to set DATA1 as the
expected value of the sequence toggle bit for the
next transaction of the pertinent pipe.
expected value of the sequence toggle bit for the
next transaction of the pertinent pipe.
0: Invalid
1: Specifies DATA1.
Setting this bit to 1 allows this module to set DATA1
as the expected value of the sequence toggle bit of
the pertinent pipe. This module always sets this bit to
0.
as the expected value of the sequence toggle bit of
the pertinent pipe. This module always sets this bit to
0.
Set the SQSET bit to 1 while CSSTS is 0 and PID is
NAK.
NAK.
Before modifying this bit after modifying the PID bits
for the corresponding pipe from BUF to NAK, check
that CSSTS and PBUSY are 0. However, if the PID
bits have been modified to NAK by this module,
checking PBUSY is not necessary.
for the corresponding pipe from BUF to NAK, check
that CSSTS and PBUSY are 0. However, if the PID
bits have been modified to NAK by this module,
checking PBUSY is not necessary.
6
SQMON
0
R
Toggle Bit Confirmation
Indicates the expected value of the sequence toggle
bit for the next transaction of the pertinent pipe.
bit for the next transaction of the pertinent pipe.
0: DATA0
1: DATA1
When the pertinent pipe is not for the isochronous
transfer, this module allows this bit to toggle upon
normal completion of the transaction. However, this
bit is not allowed to toggle when a DATA-PID
disagreement occurs during the receiving transfer.
transfer, this module allows this bit to toggle upon
normal completion of the transaction. However, this
bit is not allowed to toggle when a DATA-PID
disagreement occurs during the receiving transfer.