Renesas R5S72641 User Manual
Section 1 Overview
Page 28 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Classification Symbol
I/O Name
Function
General I/O
ports
ports
PA3 to PA0,
PB22 to PB1,
PC10 to PC0,
PD15 to PD0,
PF12 to PF0,
PG24 to PG0,
PJ11 to PJ0,
PK11 to PK0
PB22 to PB1,
PC10 to PC0,
PD15 to PD0,
PF12 to PF0,
PG24 to PG0,
PJ11 to PJ0,
PK11 to PK0
I/O
General port
89 general I/O port pins in the
SH7262 Group.
SH7262 Group.
115 general I/O port pins in the
SH7264 Group.
SH7264 Group.
Only PA3 to PA0, PB22 to PB1, PC8
to PC0, PD15 to PD0, PF12 to PF0,
PG20 to PG0, and PJ3 to PJ0 can
be used in the SH7262 Group.
to PC0, PD15 to PD0, PF12 to PF0,
PG20 to PG0, and PJ3 to PJ0 can
be used in the SH7262 Group.
PE5 to PE0
I/O
General port
6 input port pins with open-drain
output.
output.
PH7 to PH0
I
General port
4 general input port pins in the
SH7262 Group.
SH7262 Group.
8 general input ports pin in the
SH7264 Group.
SH7264 Group.
Only PH3 to PH0 can be used in the
SH7262 Group.
SH7262 Group.
Motor control
PWM timer
PWM timer
PWM1H to
PWM1A,
PWM2H to
PWM2A
PWM1A,
PWM2H to
PWM2A
O
Timer output
PWM output pins.
User debugging
interface
interface
TCK
I
Test clock
Test-clock input pin.
TMS
I
Test mode select Test-mode select signal input pin.
TDI
I
Test data input
Serial input pin for instructions and
data.
data.
TDO
O
Test data output
Serial output pin for instructions and
data.
data.
TRST
I
Test reset
Initialization-signal input pin.
Emulator
interface
interface
AUDATA3 to
AUDATA0
AUDATA0
O
Data
Branch source or destination
address output pins.
address output pins.
AUDCK
O
Clock
Sync-clock output pin.
AUDSYNC
O
Sync signal
Data start-position acknowledge-
signal output pin.
signal output pin.
ASEBRKAK O Break
mode
acknowledge
Indicates that the E10A-USB
emulator has entered its break
mode.
emulator has entered its break
mode.
ASEBRK
I
Break request
E10A-USB emulator break input pin.