Renesas R5S72641 User Manual

 
Section 14   Realtime Clock 

 

 

Page 694 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

4 

CIE 

0 

R/W 

Carry Interrupt Enable Flag 

When the carry flag (CF) is set to 1, the CIE bit enables 
interrupts. 

0: A carry interrupt is not generated when the CF flag is 

set to 1 

1: A carry interrupt is generated when the CF flag is set 

to 1 

3 

AIE 

0 

R/W 

Alarm Interrupt Enable Flag 

When the alarm flag (AF) is set to 1, the AIE bit allows 
interrupts. 

0: An alarm interrupt is not generated when the AF flag 

is set to 1 

1: An alarm interrupt is generated when the AF flag is 

set to 1 

2, 1 

 All 

0 

R 

Reserved 

These bits are always read as 0. The write value should 
always be 0. 

0 AF 

Undefined 

R/W 

Alarm 

Flag 

The AF flag is set when the alarm time, which is set by 
an alarm register (ENB bit in RSECAR, RMINAR, 
RHRAR, RWKAR, RDAYAR, RMONAR, or RYRAR is 
set to 1), and counter match. 

0: Alarm register and counter not match 

[Clearing condition] 

When 0 is written to AF. 

1: Alarm register and counter match* 

[Setting condition] 

When alarm register (only a register with ENB bit set to 
1) and counter match 

Note:  *  Writing 1 holds previous value.