Motorola IH5 User Manual

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Block Diagram
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Interval Timers
The PBC has three built-in counters that are equivalent to those found in a 
82C54 programmable interval timer. Each counter output has a specific 
function:
Counter 0 is associated with IRQ0 and can be used for system 
timing functions, such as timer interrupt for a time-of-day.
Counter 1 is used to generate a refresh request signal for ISA 
memory. This timer is not used.
Counter 2 provides the tone for the Speaker output function. This 
timer is not used.
These counters are driven with a 14.31818 MHz clock source.
Real-Time Clock/NVRAM/Watchdog Timer Function
The MCPN750A employs an SGS-Thomson surface-mount M48T559 
RAM and clock chip to provide 8KB of non-volatile static RAM, a real-
time clock, and a watchdog timer function. This chip supplies a clock, 
oscillator, crystal, power failure detection, memory write protection, 8KB 
of NVRAM, and a battery in a package consisting of two parts:
A 28-pin 330mil SO device containing the real-time clock (RTC), 
the oscillator, power failure detection circuitry, timer logic, 8KB of 
static RAM (SRAM), and gold-plated sockets for a battery (the 
SNAPHAT battery).
A SNAPHAT battery housing a crystal along with the battery.
The SNAPHAT battery package is socket mounted on top of the M48T559 
device. The battery housing is keyed to prevent reverse insertion. Since 
this is a lithium battery, be sure and observe the warnings and steps in the 
section titled Replacing Lithium Batteries in this chapter when replacing 
this battery.
The output of the watchdog timer is logically ORed onboard to provide a 
hard reset. The interrupt output generates an ISA interrupt.