Compaq EV67 User Manual

Page of 356
Alpha 21264/EV67 Hardware Reference Manual
Internal Architecture
2–17
Instruction Issue Rules
2.3.1 Instruction Group Definitions
Table 2–2 lists the instruction class,  the pipeline assignments, and the instructions 
included in the class.
Table 2–2 Instruction Name, Pipeline, and Types
Class
Name
Pipeline
Instruction Type
ild
L0, L1
All integer load instructions
fld
L0, L1
All floating-point load instructions
ist
L0, L1
All integer store instructions
fst
FST0, FST1, L0, L1 All floating-point store instructions
lda
L0, L1, U0, U1
LDA, LDAH
mem_misc
L1
WH64, ECB, WMB
rpcc
L1
RPCC
rx
L1
RS, RC
mxpr
L0,  L1
(depends on IPR)
HW_MTPR, HW_MFPR
ibr
U0, U1
Integer conditional branch instructions
jsr
L0
BR, BSR, JMP, CALL, RET, COR, HW_RET, 
CALL_PAL
iadd
L0, U0, L1, U1
Instructions with opcode 10
16
, except CMPBGE
ilog
L0, U0, L1, U1
AND, BIC, BIS, ORNOT, XOR, EQV, CMPBGE
ishf
U0, U1
Instructions with opcode 12
16
cmov
L0, U0, L1, U1
Integer CMOV — either cluster
imul
U1
Integer multiply instructions
imisc
U0
CTLZ, CTPOP, CTTZ, PERR, MINxxx, MAXxxx, PKxx, 
UNPKxx
fbr
FA
Floating-point conditional branch instructions
fadd
FA
All floating-point operate instructions except multiply, 
divide, square root, and conditional move instructions
fmul
FM
Floating-point multiply instruction
fcmov1
FA
Floating-point CMOV—first half
fcmov2
FA
Floating-point CMOV— second half
fdiv
FA
Floating-point divide instruction
fsqrt
FA
Floating-point square root instruction
nop
None
TRAP, EXCB, UNOP - LDQ_U  R31, 0(Rx)