Fujitsu mb91192 User Manual

139

Figure 5.9-7 Port D function selection register (PFSD)

Table 5.9-1 Operation of function selection bits

Function selection bits

0 1

[bit7]: PWM00E

General-purpose port

PWM00 output

[bit6]: PWM01E

General-purpose port

PWM01 output

[bit5]: PWM02E

General-purpose port

PWM02 output

[bit4]: PWM10E

General-purpose port

PWM10 output

[bit3]: PWM11E

General-purpose port/SCS2 input

PWM11 output

[bit2]: PWM12E

General-purpose port/SCS1 input

PWM12 output

[bit1]: SCK0E

General-purpose port

SCK0 input/output

[bit0]: SO0E

General-purpose port

SO0 output

Table 5.9-2 Operation of function selection bits

Function selection bits

0 1

[bit7]:

General-purpose port/SI0 input

Setting prohibited

[bit6]:

General-purpose port/SCS0 input

Setting prohibited

[bit5]: SCK1E

General-purpose port

SCK1 input/output

[bit4]: SO1E

General-purpose port

SO1 output

[bit3]: General-purpose

port/SI1,

INT2

input

Setting prohibited

[bit2]: SCK2E

General-purpose port

SCK2 input/output

[bit1]: SO2E

General-purpose port

SO2 output

[bit0]:

General-purpose port/SI2 input

Setting prohibited

7 6 5 4 3 2 1 0

0000 0000

Initial value

bit

SCK1E

SO1E

SCK2E

SO2E

Access

Address: 000026