Silicon Laboratories C8051F340 User Manual

Page of 282
Rev. 0.5
215
C8051F340/1/2/3/4/5/6/7
Figure 18.6. UART Multi-Processor Mode Interconnect Diagram
Master
Device
Slave
Device
TX
RX
RX
TX
Slave
Device
RX
TX
Slave
Device
RX
TX
V+