Intel 8XC196MD User Manual
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8XC196MC, MD, MH USER’S MANUAL
11-4
INT_PEND
0009H
0009H
0009H
Interrupt Pending
Any set bit in this 8-bit register indicates a pending
interrupt request.
interrupt request.
INT_PEND1
0012H
0012H
0012H
Interrupt Pending 1
Any set bit in this 8-bit register indicates a pending
interrupt request.
interrupt request.
P2_DIR
P7_DIR
P7_DIR
1FD2H
—
1FD2H
1FD3H
1FD3H
1FD2H
—
Port
x
Direction
Each bit of P
x
_DIR controls the direction of the
corresponding pin. Clearing a bit configures a pin
as a complementary output; setting a bit
configures a pin as an input or open-drain output.
(Open-drain outputs require external pull-ups.)
as a complementary output; setting a bit
configures a pin as an input or open-drain output.
(Open-drain outputs require external pull-ups.)
P2_MODE
P7_MODE
P7_MODE
1FD0H
—
1FD0H
1FD1H
1FD0H
—
Port
x
Mode
Each bit of P
x
_MODE controls whether the corre-
sponding pin functions as a standard I/O port pin
or as a special-function signal. Setting a bit
configures a pin as a special-function signal;
clearing a bit configures a pin as a standard I/O
port pin.
or as a special-function signal. Setting a bit
configures a pin as a special-function signal;
clearing a bit configures a pin as a standard I/O
port pin.
P0_PIN
P1_PIN
P2_PIN
P7_PIN
P1_PIN
P2_PIN
P7_PIN
1FA8H
1FA9H
1FA9H
1FD6H
—
1FA8H
1FA9H
1FA9H
1FD6H
1FD7H
1FD7H
1FDAH
1F9FH
1FD6H
—
Port
x
Input
Each bit of P
x
_PIN reflects the current state of the
corresponding pin, regardless of the pin configu-
ration.
ration.
P2_REG
P7_REG
P7_REG
1FD4H
—
1FD4H
1FD5H
1FD5H
1FD4H
—
Port
x
Data Output
For an input, set the corresponding P
x
_REG bit.
For an output, write the data to be driven out by
each pin to the corresponding bit of P
each pin to the corresponding bit of P
x
_REG.
When a pin is configured as standard I/O
(P
(P
x
_MODE.
y
= 0), the result of a CPU write to
P
x
_REG is immediately visible on the pin. When a
pin is configured as a special-function signal
(P
(P
x
_MODE.
y
= 1), the associated on-chip
peripheral or off-chip component controls the pin.
The CPU can still write to P
The CPU can still write to P
x
_REG, but the pin is
unaffected until it is switched back to its standard
I/O function.
I/O function.
This feature allows software to configure a pin as
standard I/O (clear P
standard I/O (clear P
x
_MODE.
y
), initialize or
overwrite the pin value, then configure the pin as a
special-function signal (set P
special-function signal (set P
x
_MODE.
y
). In this
way, initialization, fault recovery, exception
handling, etc., can be done without changing the
operation of the associated peripheral.
handling, etc., can be done without changing the
operation of the associated peripheral.
Table 11-3. EPA Control and Status Registers (Continued)
Mnemonic
Address
Description
MC
MD
MH