Intel 80C196NU User Manual
8XC196NP, 80C196NU USER’S MANUAL
10-2
Figure 10-1. EPA Block Diagram
10.2 EPA AND TIMER/COUNTER SIGNALS AND REGISTERS
Table 10-1 describes the EPA and timer/counter input and output signals. Each signal is multi-
plexed with a port pin as shown in the first column. Table 10-2 briefly describes the registers for
the EPA capture/compare channels and timer/counters.
plexed with a port pin as shown in the first column. Table 10-2 briefly describes the registers for
the EPA capture/compare channels and timer/counters.
Table 10-1. EPA and Timer/Counter Signals
Port Pin
EPA Signal(s)
EPA
Signal Type
Description
P1.3:0
EPA3:0
I/O
High-speed input/output for capture/compare
channels 0–3.
channels 0–3.
P1.4
T1CLK
I
External clock source for timer 1.
P1.5
T1DIR
I
External direction control for timer 1.
P1.6
T2CLK
I
External clock source for timer 2.
P1.7
T2DIR
I
External direction control for timer 2.
A2352-02
TIMER1
TIMER2
Timer-Counter Unit
Capture/Compare
Channel 3
Capture/Compare
Channel 2
Capture/Compare
Channel 1
Capture/Compare
Channel 0
EPA3
EPA2
EPA1
EPA0
EPA0 Interrupt
EPA1 Interrupt
EPA2 Interrupt
EPA3 Interrupt