Intel 80C196NU User Manual
8XC196NP, 80C196NU USER’S MANUAL
13-2
13.2 EXTERNAL MEMORY INTERFACE SIGNALS
Table 13-2 describes the external memory interface signals. For some signals, the pin has an al-
ternate function (shown in the Multiplexed With column). In some cases the alternate function is
a port signal (e.g., P2.7). Chapter 7, “I/O Ports,” describes how to configure a pin for its I/O port
function and for its special function. In other cases, the signal description includes instructions
for selecting the alternate function.
ternate function (shown in the Multiplexed With column). In some cases the alternate function is
a port signal (e.g., P2.7). Chapter 7, “I/O Ports,” describes how to configure a pin for its I/O port
function and for its special function. In other cases, the signal description includes instructions
for selecting the alternate function.
Table 13-2. External Memory Interface Signals
Name
Type
Description
Multiplexed
With
A15:0
I/O
System Address Bus
These address lines provide address bits 15–0 during the entire
external memory cycle during both multiplexed and demultiplexed
bus modes.
external memory cycle during both multiplexed and demultiplexed
bus modes.
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A19:16
I/O
Address Lines 16–19
These address lines provide address bits 16–19 during the entire
external memory cycle, supporting extended addressing of the
1 Mbyte address space.
external memory cycle, supporting extended addressing of the
1 Mbyte address space.
NOTE:
Internally, there are 24 address bits; however, only 20
address lines (A19:0) are bonded out. The internal address
space is 16 Mbytes (000000–FFFFFFH) and the external
address space is 1 Mbyte (00000–FFFFFH). The device
resets to FF2080H in internal ROM or F2080H in external
memory.
address lines (A19:0) are bonded out. The internal address
space is 16 Mbytes (000000–FFFFFFH) and the external
address space is 1 Mbyte (00000–FFFFFH). The device
resets to FF2080H in internal ROM or F2080H in external
memory.
EPORT.3:0
AD15:0
I/O
Address/Data Lines
The function of these pins depend on the bus size and mode. When
a bus access is not occurring, these pins revert to their I/O port
function.
16-bit Multiplexed Bus Mode:
AD15:0 drive address bits 0–15 during the first half of the bus cycle
and drive or receive data during the second half of the bus cycle.
8-bit Multiplexed Bus Mode:
AD15:8 drive address bits 8–15 during the entire bus cycle. AD7:0
drive address bits 0–7 during the first half of the bus cycle and either
drive or receive data during the second half of the bus cycle.
16-bit Demultiplexed Mode:
AD15:0 drive or receive data during the entire bus cycle.
a bus access is not occurring, these pins revert to their I/O port
function.
16-bit Multiplexed Bus Mode:
AD15:0 drive address bits 0–15 during the first half of the bus cycle
and drive or receive data during the second half of the bus cycle.
8-bit Multiplexed Bus Mode:
AD15:8 drive address bits 8–15 during the entire bus cycle. AD7:0
drive address bits 0–7 during the first half of the bus cycle and either
drive or receive data during the second half of the bus cycle.
16-bit Demultiplexed Mode:
AD15:0 drive or receive data during the entire bus cycle.
8-bit Demultiplexed Mode:
AD7:0 drive or receive data during the entire bus cycle. AD15:8 drive
the data that is currently on the high byte of the internal bus.
AD7:0 drive or receive data during the entire bus cycle. AD15:8 drive
the data that is currently on the high byte of the internal bus.
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